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Espressif Systems /ESP32-H2 /PARL_IO /RX_MODE_CFG

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Interpret as RX_MODE_CFG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RX_EXT_EN_SEL 0 (RX_SW_EN)RX_SW_EN 0 (RX_EXT_EN_INV)RX_EXT_EN_INV 0RX_PULSE_SUBMODE_SEL 0RX_SMP_MODE_SEL

Description

Parallel RX Sampling mode configuration register.

Fields

RX_EXT_EN_SEL

Configures rx external enable signal selection from IO PAD.
RX_SW_EN

Set this bit to enable data sampling by software.
RX_EXT_EN_INV

Set this bit to invert the external enable signal.
RX_PULSE_SUBMODE_SEL

Configures the rxd pulse sampling submode. 4’d0: positive pulse start(data bit included) && positive pulse end(data bit included) 4’d1: positive pulse start(data bit included) && positive pulse end (data bit excluded) 4’d2: positive pulse start(data bit excluded) && positive pulse end (data bit included) 4’d3: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 4’d4: positive pulse start(data bit included) && length end 4’d5: positive pulse start(data bit excluded) && length end
RX_SMP_MODE_SEL

Configures the rxd sampling mode. 2’b00: external level enable mode 2’b01: external pulse enable mode 2’b10: internal software enable mode

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data